1. Field of the Invention
The present invention generally relates to inspection devices of semiconductor devices, and more specifically, to an inspection device of a semiconductor device provided in an IC socket, the inspection device being configured to inspect an electrical property of the semiconductor device.
2. Description of the Related Art
Conventionally, a method wherein measurement is implemented by using a standard sample so that whether abnormality is generated in an inspection device is determined before inspection or test of a semiconductor device such as a semiconductor integrated circuit (IC) starts, has been used.
FIG. 1 is a schematic view showing a structure of a related art inspection device of a flat type package semiconductor device.
Referring to FIG. 1, the related art inspection device 10 of a flat type package semiconductor device includes a tester 1, a test head 2, a printed circuit board 4, an IC socket main body part 6, an IC socket lid part 5, and others.
The test head 2 is connected to the tester 1 via a wiring. The printed circuit board 4 is connected to the test head 2 via first pogo pins 3 in an upper part of the test head 2. The IC socket main body part 6 is connected to the printed circuit board 4 via second pogo pins 5 on the printed circuit board 4. The IC socket lid part 7 is provided above the IC socket main body part 6 so as to cover the IC socket main body part 6.
The corresponding first pogo pins 3 and second pogo pins 5 are connected to each other via wiring and terminals of the printed circuit board 4. Furthermore, semiconductor device supporting parts 8 are formed from an inside lower surface of the IC socket lid part 7 in a perpendicular direction.
FIG. 2 is cross-sectional view showing a main part of the related art inspection device 10 shown in FIG. 1 in a state where the flat type package semiconductor device is installed in the inspection device 10.
Referring to FIG. 2, leads 12 of a semiconductor device 11 are provided on the second pogo pins 5 provided on the IC socket main body part 6. The leads 12 are supported by the corresponding semiconductor supporting parts 8 of the IC socket lid part 7 from upper parts of the leads 12.
Therefore, the semiconductor device 11 can be electrically connected to the test head 2 by the second pogo pins 5, the printed circuit board 4 and the first pogo pins 3 shown in FIG. 1 and can be electrically connected to the tester 1 via the wiring.
In addition, in a case where the semiconductor device is an area type package semiconductor device, a structure shown in FIG. 3 can be applied to a main part of the inspection device.
Here, FIG. 3 is a cross-sectional view showing a main part of a related art inspection device of an area type package semiconductor device in a state where the area type package semiconductor device is installed in the inspection device.
Referring to FIG. 3, a large number of connection terminals 14 formed on a lower surface of the area type package semiconductor device 13 correspond to positions of the second pogo pins 5 in the IC socket main body 6. Under this structure, the semiconductor device 13 is supported from an upper part of the semiconductor device 13 by the semiconductor device supporting parts 18 of the IC socket lid part 7.
Therefore, the semiconductor device 13 can be electrically connected to the test head 2 by the second pogo pins 5, the printed circuit board 4 and the first pogo pins 3 shown in FIG. 1 and can be electrically connected to the tester 1 via the wiring.
In the inspection devices shown in FIG. 1 through FIG. 3, a designated standard sample, instead of the semiconductor device 11 and the semiconductor device 13, can be installed. In the related art, prior to starting of inspection or test of the semiconductor device, the standard sample is measured by the inspection device shown in FIG. 1 through FIG. 3.
A data measured value of the standard sample obtained by measurement and a data standard value of a standard sample obtained previously and maintained are compared, so that whether abnormality of the inspection device 10 is generated is determined. Based on the determination that the abnormality of the inspection device 10 is not generated, the standard sample is exchanged for the semiconductor device 11 or 13 being an actual body to be inspected so that the inspection or test of the semiconductor device is started.
Furthermore, a method is disclosed in Japanese Laid-Open Patent Application Publication No. 6-148269 wherein, in a wiring test of a printed circuit board, wire test pattern data from a file are applied to the printed circuit board, and in a tester, an output of the printed circuit board is compared with the results of simulation stored in the file in performing the wiring test of the printed circuit board.
In addition, a socket type IC test device is disclosed in Japanese Laid-Open Patent Application Publication No. 5-322971. In the device, leads corresponding to each socket probe in a socket are provided, a test IC connected to a resistor of a certain value or directly contacted is provided in between each specific lead and another lead, and means for pushing the lead of the test IC to the socket probe are provided. A contact status measurement circuit is provided which impresses a voltage in turn between a specific socket probe contacting a specific lead of the IC and another socket probe contacting another lead, measures the resistance values of the socket probes, compares them with a standard value and outputs the signal exceeding the standard value, and outputs the signals below or above the standard value.
However, in the above-discussed related art inspection device of the semiconductor device, the standard sample is prepared and the data measured value of the standard sample obtained by measurement and the data standard value of the standard sample obtained previously and maintained are compared. When it is determined that the abnormality of the inspection device is not generated, the standard sample is exchanged for the semiconductor device being an actual body to be inspected so that the inspection or test of the semiconductor device is started. Therefore, a lot of complex processes are required for these operations.
In addition, in a case where the generation of the abnormality is found, a complex operation is necessary for determining whether the reason of the abnormality is caused by a bad connection between the IC socket and the standard sample or by a problem on the side of the measuring device such as a measuring circuit or measuring device (tester).
Furthermore, since the standard sample and the standard sample data are provided in positions separated from each other, an error in maintaining the standard sample and the standard sample data may occur or an error of comparison between the data obtained by measuring the standard sample and the standard sample data obtained previously and maintained may occur.